During the life cycle of memory devices, for example, silicon-based non-volatile memory (NVM) devices, the devices are subject to degradation through normal usage. From a signal processing/coding point of view, this implies that that the communication channel quality degrades over time, which may eventually affect data reliability of the device. Flash devices, for example, are typically exposed to reliability issues such as read disturb, endurance, and retention as memory cells cycle through multiple read and/or write operations.
To account for these reliability issues, various communication systems utilize an error correction code (ECC) encoding scheme. In NVM devices, an ECC encoding scheme utilizes a memory data structure that is segregated into a payload portion and a redundancy portion. A divider segregates these portions and can be dynamically allocated whereby the size of the redundancy portion and strength of the ECC contained within the redundancy portion are selected in response to changing conditions. Different ECC's have relative advantages and disadvantages in terms of the strength of their error detection and correction ability, their memory space requirements, and their execution speed.
Generally variations in NVM devices or communication channels occur in a systematic manner over a period of time. As a result, redundancy within NVM devices may need to be reallocated. Media ages and use levels are monitored, and in response to changes in reliability, the size of the redundancy with respect to the payload can be changed to more appropriate ECC. This reallocation can occur dynamically or at regular intervals, but it remains channel dependent. In other words, the ECC scheme is chosen to adapt to the channel conditions in a predetermined manner.
The description in this section is related art, and does not necessarily include information disclosed under 37 C.F.R. 1.97 and 37 C.F.R. 1.98. Unless specifically denoted as prior art, it is not admitted that any description of related art is prior art.